Texas Instruments SN54ABT377

these 8-bit positive-edge-triggered d-type flip-flops with a clock (clk) input are particularly suitable for implementing buffer and storage registers shift registers and pattern generators. data (d) input information that meets the setup time requirements is transferred to the q outputs on the positive-going edge of the clock pulse if the common clock-enable () input is low. clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. when the buffered clock (clk) input is at either the high or low level the d-input signal has no effect at the output. the circuits are designed to prevent false clocking by transitions at . view all in datasheet