Win Source CPLDs - Complex Programming Logic Devices

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SPLD GAL Family 8 Macro Cells 41.6MHz EECMOS Technology 3.3V 20-Pin PLCC
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FPGA FLEX 10KA Family 30K Gates 1728 Cells 166.67MHz CMOS Technology 3.3V 208-Pin PQFP
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CPLD MAX 7000A Family 600 Gates 32 Macro Cells CMOS Technology 3.3V/5V 44-Pin PLCC
CPLD MAX® 7000AFamily 2.5KGates 128Macro Cells 87MHz 3.3V 84-Pin PLCC
CPLD Ultra37000 Family 960 Gates 32 Macro Cells 143MHz CMOS Technology 3.3V 48-Pin BGA
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CPLD MAX® 7000AFamily 2.5KGates 128Macro Cells 116.3MHz 3.3V 84-Pin PLCC
CPLD Ultra37000 Family 960 Gates 32 Macro Cells 154MHz CMOS Technology 5V 44-Pin PLCC
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