Win Source CPLDs - Complex Programming Logic Devices

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FPGA APEX 20K Family 400K Gates 16640 Cells 223MHz 0.22um Technology 1.8V 672-Pin FC-FBGA
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SPLD ispGAL® Family 10 Macro Cells 83.3MHz CMOS Technology 3.3V 28-Pin PLCC
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CPLD MAX 7000A Family 600 Gates 32 Macro Cells 138.9MHz CMOS Technology 3.3V 44-Pin TQFP
CPLD MAX 7000S Family 1.25K Gates 64 Macro Cells 140.8MHz 5V 44-Pin TQFP
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FPGA APEX 20K Family 100K Gates 4160 Cells 250MHz CMOS Technology 2.5V 356-Pin BGA
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SPLD GAL Family 8 Macro Cells 62.5MHz EECMOS Technology 5V 20-Pin PLCC
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CPLD ispMACH 4A Family 1.25K Gates 32 Macro Cells 133MHz/182MHz 3.3V 44-Pin TQFP Tray
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