Texas Instruments SN74BCT8373ADWR

Latch Transparent 3-ST 8CH D-type 24SOIC
$ 3.229

Price and Stock

Datasheets & Documents

Download datasheets and manufacturer documentation for Texas Instruments SN74BCT8373ADWR.

Texas Instruments

Datasheet28 pages18 years ago

Augswan

Sierra IC

Inventory History

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Alternate Parts

Price @ 1000
$ 3.229
$ 8.713
$ 8.713
Stock
341,797
154,262
154,262
Authorized Distributors
2
3
3
Case/Package
SOIC
SOIC
SOIC
Number of Pins
24
24
24
Logic Function
D-Type
D-Type
D-Type
Number of Circuits
-
-
-
Number of Inputs
-
-
-
Number of Outputs
-
8
8
Propagation Delay
-
29 ns
29 ns
Low Level Output Current
-
64 mA
64 mA
High Level Output Current
-
-15 mA
-15 mA
Min Supply Voltage
-
4.5 V
4.5 V
Max Supply Voltage
-
5.5 V
5.5 V

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Descriptions

Descriptions of Texas Instruments SN74BCT8373ADWR provided by its distributors.

LATCH TRANSPARENT 3-ST 8CH D-TYPE 24SOIC
Specialty Logic IC; Logic Family:BCT; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:24-SOIC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes
The 'BCT8373A scan test devices with octal D-type latches are members of the Texas Instruments SCOPETM testability integrated- circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface. In the normal mode, these devices are functionally equivalent to the 'F373 and 'BCT373 octal D-type latches. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals or to perform a self test on the boundary test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPETM octal latches. In the test mode, the normal operation of the SCOPETM octal latches is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform boundary scan test operations, as described in IEEE Standard 1149.1-1990. Four dedicated test terminals are used to control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry can perform other testing functions such as parallel signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface. The SN54BCT8373A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT8373A is characterized for operation from 0°C to 70°C.

Manufacturer Aliases

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