Clock Fanout Buffer 8-OUT 2-IN Dual 1: 2 16-Pin VQFN EP T/R

CDCLVD2102 Clock Buffer and Driver Evaluation Board

standard package

the cdclvd2102 clock buffer distributes two clock inputs (in0 in1) to a total of 4 pairs of differential lvds clock outputs (out0 out3). each buffer

Low jitter, dual 1: 2 universal-to-LVDS buffer 16-VQFN -40 to 85