Analog Devices AD6633CBCZ

Up/Down Conv Mixer 1.8V 196-Pin CSP-BGA Tray

The AD6633 is a multi-channel, wide-bandwidth (Digital) Transmit Signal Processor (TSP) with VersaCREST™ crest reduction engine. It processes digital baseband input data and generates wideband, real or complex output data. It drives Intermediate Frequency (IF) sampling Digital to Analog Converters (DACs) at sample rates up to 125 Mega Samples Per Second (MSPS). Up to six wideband modulated carriers per package can be achieved from a single output port. Devices may be connected together for additional channels by using multiple packages. Interpolation, anti-imaging filtering, all pass equalization, and NCO tuning functions are combined in a single, cost-effective device which includes the VersaCREST™ crest factor reduction engine. Each VersaCREST™ wideband channel contains a peak-to-average compensation block that reduces Power Amplifier (PA) requirements. By minimizing infrequent peaks in Code-Division Multiple-Access (CDMA) signals, a PA with one-half to one-quarter the previously necessary power capacity can be used. This is done within standard signal quality requirements, and significantly lowers system cost. VersaCREST is a trademark of Analog Devices Inc. APPLICATIONS Cellular/PCS basestations Micro/pico cell basestations Multicarrier cdma2000®, WCDMA, TD-SCDMA basestations Broadband wireless access head ends (LMDS, MMDS) Software defined radios High speed signal processing applications

The AD6633 is a multichannel, wide bandwidth digital up converter (DUC) with crest factor reduction (CFR) technology, which is available in 4-channel or 6-channel versions. It processes 20-bit baseband input data and generates 18-bit, wideband, real, or complex output data at up to 125 MSPS. This rate is suitable for driving digital-to-analog converters (DACs) at the first intermediate frequency (IF) directly. The AD6633 synthesizes multi carrier and multi standard digital signals to drive the DAC(s) with up to six wideband modulated carriers from a single output port. Each channel includes an internal peak-to-average power reduction block that reduces power amplifier (PA) power dissipation. The user-configurable interpolating filter (RCF) provides multi rate processing (including resampling) and malleable FIR filter characteristics. An all-pass phase equalizer designed to comply with the cdma2000 standard follows the RCF. Each channel has its own 32-bit numerically-controlled oscillator (NCO) to up-convert the filtered/interpolated data to the first IF. Interpolation, anti-image filtering, all-pass equalization, and NCO tuning functions are combined in a single, cost-effective device. Digital IF signal processing provides repeatable manufacturing, higher accuracy, and more flexibility than comparable high dynamic range analog designs. The AD6633 uses a 3.3 V I/O power supply and a 1.8 V core power supply. Typical power consumption is 75 mW per channel or 1.4 W for the complete device. All I/O pins are 5 V tolerant. All control registers and coefficient values are programmed through a generic 16-bit microprocessor interface or a SPI/SPORT-compatible serial port. Intel and Motorola microprocessor bus modes are supported. All inputs and outputs are LVCMOS-compatible. For more information about the AD6633, contact Analog Devices via email at versaCOMM@analog.com.