onsemi MM74HCT574WM

Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop | IC FF D-TYPE SNGL 8BIT 20SOIC

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SOIC W Rail

8¦ÌA 30ns@ 5V,50pF , 1 4.5V 5.5V 7.2mA Standard HCT 10pF 7.2mA 33MHz SOIC-20 13mm*7.6mm*2.35mm

74HCT CMOS, SMD, 74HCT574, SOIC20; Flip-Flop Type:D; Propagation Delay:18ns; Frequency:60MHz; Output Current:7.2mA; Trigger Type:Positive Edge; IC Output Type:Tri State; Supply Voltage Range:4.5V to 5.5V; Logic Case Style:SOIC; No. of Pins:20; Operating Temperature Range:-40°C to +85°C; SVHC:No SVHC (20-Jun-2011); Base Number:74; IC Generic Number:74HCT574; Logic Function Number:74574; Logic IC Base Number:74574; Logic IC Family:HCT; Logic IC Function:Octal D-Type Flip-Flop; Positive Edge-Trigger (3-State); No. of Gates:8; No. of Inputs:1; Operating Temperature Max:85°C; Operating Temperature Min:-40°C; Output Type:Tri State Non Inverted; Package / Case:SOIC; Supply Voltage:5.5V; Supply Voltage Max:5.5V; Supply Voltage Min:4.5V; Termination Type:SMD

The MM74HCT573 octal D-type latches and MM74HCT574 octal D-type flip-flop advanced silicon-gate CMOS technology, which provides the inherent benefits of low power consumption and wide power supply range, but are LS-TTL input and output characteristic and pin-out compatible. The 3-STATE outputs are capable of driving 15 LS-TTL loads. All inputs are protected from damage due to static discharge by internal diodes to VCC and ground. When the MM74HCT573 Latch Enable input is HIGH, the Q outputs will follow the D inputs. When the Latch Enable goes LOW, data at the D inputs will be retained at the outputs until Latch Enable returns HIGH again. When a high logic level is applied to the Output Control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The MM74HCT574 are positive edge triggered flip-flops. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the Clock (CK) input. When a high logic level is applied to the Output Control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.