onsemi MC74HC74ADG

Name: onsemi MC74HC74ADG
Brand: onsemi
SKU: MC74HC74ADG

74HC Series 2 to 6 V Dual D-Type Flip-Flop with Set and Reset - SOIC-14

$ 0.207

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Distributor		SKU		Min	Pkg
Avnet	2	MC74HC74ADG	12,650	1		0.241	0.228	0.225	0.225	0.225	14h
Future Electronics	2	MC74HC74ADG	2,600	150	Tube				0.144	0.138
Newark	2	MC74HC74ADG	259	1		0.613	0.466	0.466	0.352	0.325
Master Electronics		MC74HC74ADG	3,465	110					0.197	0.186
Onlinecomponents.com		MC74HC74ADG	3,465	110	Bulk				0.197	0.186

数据表和文档

下载 onsemi MC74HC74ADG 的数据表和制造商文档。

Upverter

Technical Drawing2 页3 年前

Datasheet9 页11 年前

Newark

IHS

onsemi

HQonline

库存历史记录

3 个月趋势:

-8.73%

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onsemiMC74HC74ADG

onsemiMC74HC74ADR2G

Price @ 1000

$ 0.207

$ 0.148

Stock

715,324

1,518,104

Authorized Distributors

Case/Package

SOP

Number of Pins

Logic Function

AND, D-Type, Flip-Flop

Number of Elements

Number of Bits per Element

Propagation Delay

150 ns

Frequency

20 MHz

Clock Edge Trigger Type

Positive Edge

Min Supply Voltage

2 V

Max Supply Voltage

6 V

Quiescent Current

2 µA

供应链

Country of OriginMainland China, Philippines, Thailand

Harmonized Tariff Schedule (HTS) Code8542.39.00.60

Introduction Date1995-10-01

Lifecycle StatusProduction (Last Updated: 5 years ago)

Manufacturer Lifecycle StatusACTIVE (Last Updated: 5 years ago)

描述

由其分销商提供的 onsemi MC74HC74ADG 的描述。

74HC Series 2 to 6 V Dual D-Type Flip-Flop with Set and Reset - SOIC-14

Future Electronics

Flip Flop D-Type Pos-Edge 2-Element 14-Pin SOIC N Tube

Verical

ON SEMICONDUCTOR MC74HC74ADG Flip-Flop, with Set and Reset,Complementary Output, Positive Edge, D, 20 ns, 35 MHz, 5.2 mA, SOIC

Jak Electronics

D-Type Flip Flop, Dual, 20Ns Soic-14; Logic Family/Base Number:74Hc74; Flip-Flop Type:D; Propagation Delay:20Ns; Frequency:35Mhz; Output Current:5.2Ma; Ic Case/Package:Soic; No. Of Pins:14Pins; Trigger Type:Positive Edge; Msl:- Rohs Compliant: Yes |Onsemi MC74HC74ADG.

Newark

High-Performance Silicon-Gate CMOS The MC574HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors they are compatible with LSTTL outputs. This device consists of two D flip-flops with individual Set Reset and Clock inputs. Information at a D-input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Qbar outputs are available from each flip-flop. The Set and Reset inputs are asynchronous.

North Star Micro