onsemi MC74HC175ADG

Name: onsemi MC74HC175ADG
Brand: onsemi
SKU: MC74HC175ADG

74HC Series Quad D-type Flip-Flop with Common Clock and Reset - SOIC-16

$ 0.188

Production

制造商页面数据表

价格与库存

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Distributor		SKU		Min	Pkg
Avnet	2	MC74HC175ADG	3,312	6250						0.130	2d
Newark		MC74HC175ADG	324	1		0.422	0.295	0.295	0.208	0.192
Verical	4	MC74HC175ADG	8,304	1749						0.191
Rochester Electronics		MC74HC175ADG	29,556					0.207	0.172	0.153	1h
DigiKey		MC74HC175ADGOS-ND	258	1	Tube	0.410	0.286	0.237	0.194	0.173

数据表和文档

下载 onsemi MC74HC175ADG 的数据表和制造商文档。

IHS

Datasheet10 页11 年前

Master Electronics

onsemi

Newark

Future Electronics

库存历史记录

3 个月趋势:

-0.94%

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onsemiMC74HC175ADG

onsemiMC74HC175ADR2G

Price @ 1000

$ 0.188

$ 0.169

Stock

197,968

307,458

Authorized Distributors

Case/Package

SOP

Number of Pins

Logic Function

D-Type, Flip-Flop

Number of Elements

Number of Bits per Element

Propagation Delay

225 ns

Frequency

20 MHz

Clock Edge Trigger Type

Positive Edge

Min Supply Voltage

2 V

Max Supply Voltage

6 V

Quiescent Current

供应链

Lifecycle StatusProduction (Last Updated: 5 years ago)

Manufacturer Lifecycle StatusACTIVE (Last Updated: 5 years ago)

描述

由其分销商提供的 onsemi MC74HC175ADG 的描述。

74HC Series Quad D-type Flip-Flop with Common Clock and Reset - SOIC-16

Future Electronics

4¦ÌA 22ns@ 6V,50pF , 1 2V 6V 5.2mA Master Reset HC 10pF 5.2mA 35MHz SOIC-16 10mm*4mm*1.5mm

UnikeyIC

Flip Flop D-Type Bus Interface Pos-Edge 1-Element 16-Pin SOIC Tube

Verical

MC74HC175ADG QUAD D TYPE FLIP FLOP IC, LSTTL, 2 - 6 V, 16-PIN SOIC

RS (Formerly Allied Electronics)

D-Type Flip Flop, Quad, 22Ns Soic-16; Logic Family/Base Number:74Hc175; Flip-Flop Type:D; Propagation Delay:22Ns; Frequency:35Mhz; Output Current:5.2Ma; Logic Case Style:Soic; No. Of Pins:16Pins; Trigger Type:Positive Edge; Ic Rohs Compliant: Yes |Onsemi MC74HC175ADG

Newark

High-Performance Silicon-Gate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors they are compatible with LSTTL outputs. This device consists of four D flip-flops with common Reset and Clock inputs and separate D inputs. Reset (active-low) is asynchronous and occurs when a low level is applied to the Reset input. Information at a D inputis transferred to the corresponding Q output on the next positive going edge of the Clock input.

North Star Micro