Win Source 时钟缓冲器、驱动器

3.1-GHz differential clock buffer/level translator with 4 configurable outputs 32-WQFN -40 to 85

Low jitter, 1: 2 LVCMOS fan-out clock buffer 8-TSSOP -40 to 85

Clock Buffer, Driver, Fanout, 10 Outputs, 3 V to 3.6 V, 20 Pins, SSOP

HiRel, 1: 10 LVPECL buffer with selectable input 32-LQFP -55 to 125

PLL Based Clock Driver, 2308 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16

Low Skew, 1-to-4 Differential-to-3.3V LVPECL Fanout Buffer

Low Skew Clock Driver, 6C Series, 1 True Output(s), 0 Inverted Output(s), PDSO8

Zero Delay PLL Clock Buffer Single 10MHz to 220MHz 8-Pin SOIC T/R

1-line to 10-line 3.3-V clock driver with tri-state outputs 24-SSOP 0 to 70

1-line to 10-line 3.3-V clock driver with tri-state outputs 24-SOIC 0 to 70