Win Source 时钟缓冲器、驱动器

1: 10 LVPECL/HSTL to LVPECL clock driver 32-LQFP -40 to 85

PLL Based Clock Driver, 23S Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8

Clock Fanout Buffer 10-OUT 1-IN 1: 10 24-Pin TSSOP Tube

Clock Fanout Buffer 10-OUT 1-IN 1: 10 24-Pin TSSOP T/R

PLL Based Clock Driver, 2309 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16

3.1-GHz differential clock buffer/level translator with 8 configurable outputs 40-WQFN -40 to 85

Clock Generator 0.008MHz to 750MHz-IN 725MHz-OUT 64-Pin LFCSP EP Tray

1-To-6 CMOS clock driver with selectable polarity 16-SOIC -40 to 85

1-line to 18-line clock driver with I2C control interface 48-SSOP 0 to 70

Clock Fanout Buffer 4-OUT 2-IN 1: 2 16-Pin VQFN EP T/R