Texas Instruments SN74ALS646A-1DWR

Bus XCVR Single 8-CH 3-ST 24-Pin SOIC T/R
$ 5.659

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Texas Instruments

Datasheet29 páginas11 anos atrás
Official datasheet0 páginashá 0 anos
Datasheet28 páginas15 anos atrás
Technical Drawing2 páginas15 anos atrás
Datasheet28 páginas18 anos atrás

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Peças alternativas

Price @ 1000
$ 5.659
$ 6.966
$ 6.966
Stock
95,742
184,192
184,192
Authorized Distributors
2
5
5
Case/Package
SOIC
SOIC
SOIC
Number of Pins
24
24
24
Logic Function
Inverting, Transceiver
Inverting, Transceiver
Inverting, Transceiver
Number of Circuits
8
8
8
Number of Inputs
-
-
-
Propagation Delay
30 ns
30 ns
30 ns
Low Level Output Current
48 mA
15 mA
15 mA
High Level Output Current
24 mA
24 mA
24 mA
Min Supply Voltage
4.75 V
4.5 V
4.5 V
Max Supply Voltage
5.25 V
5.5 V
5.5 V
Quiescent Current
-
-
-

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Descrições

Descrições de Texas Instruments SN74ALS646A-1DWR fornecidas pelos seus distribuidores.

Bus XCVR Single 8-CH 3-ST 24-Pin SOIC T/R
Transceiver Logic IC; Logic Family:ALS; Supply Voltage Min:4.75V; Supply Voltage Max:5.25V; Package/Case:24-SOIC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
These devices consist of bus-transceiver circuits with 3-state or open-collector outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers. Output-enable () and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either or both registers. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when is low. In the isolation mode ( high), A data may be stored in one register and/or B data may be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The -1 version of the SN74ALS646A is identical to the standard version, except that the recommended maximum IOL in the -1 version is increased to 48 mA. There are no -1 versions of the SN54ALS646, SN54ALS648, or SN74ALS648A. The SN54ALS646, SN54ALS648, and SN54AS646 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS646A, SN74ALS648A, SN74AS646, and SN74AS648 are characterized for operation from 0°C to 70°C.

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  • TI/NS
  • TEX
  • Texas Instruments (TI)
  • TEXASIN
  • TEXAS INSTRUMENTS INCORPORATED
  • TEXINS
  • TEXAS INTRUMENTS
  • TEAXS
  • TEXASI
  • TEXAS INSTRUM
  • TI Texas Instruments
  • TEXAS USD
  • TEXAS INSRUMENTS
  • TEXAS INSRUMENT
  • TEXAS INSTUMENTS
  • TI-ROHS
  • Texas Instr.
  • Texas Instruments Inc.

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  • SN74ALS646A1DWR