Texas Instruments CD4018BPWR

IC, Divide-by-n Counter, Cmos, TSSOP-16 - More Details

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Texas Instruments

Datasheet15 páginas18 anos atrás

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Peças alternativas

Price @ 1000
$ 0.436
Stock
72,818
112,611
Authorized Distributors
0
4
Case/Package
TSSOP
TSSOP
Number of Pins
16
16
Logic Function
-
Counter
Direction
-
Unidirectional
Number of Elements
1
1
Number of Bits per Element
5
5
Reset
Asynchronous
Asynchronous
Clock Edge Trigger Type
Positive Edge
Positive Edge
Frequency
17 MHz
17 MHz
Min Supply Voltage
-
3 V
Max Supply Voltage
-
18 V

Descrições

Descrições de Texas Instruments CD4018BPWR fornecidas pelos seus distribuidores.

IC, DIVIDE-BY-N COUNTER, CMOS, TSSOP-16 - More Details
Counter Logic IC; Logic Family:CD4000; Supply Voltage Min:3V; Supply Voltage Max:18V; Package/Case:16-TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; Input Type:CMOS; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
CD4018B types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, DATA, PRESET ENABLE, and 5 individual JAM inputs are provided. Divide by 10, 8, 6, 4, or 2 counter configurations can be implemented by feeding the Q\5, Q\4, Q\3, Q\2, Q\1 signals, respectively, back to the DATA input. Divide-by-9, 7, 5, or 3 counter configurations can be implemented by the use of a CD4011B to gate the feedback connection to the DATA input. Divide-by functions grater than 10 can be achieved by use of multiple CD4018B units. The counter is advanced one count at the positive clock-signal transition.. Schmitt Trigger action on the clock line permits unlimited clock rise and fall times. A high RESET signal clear the counter to an all-zero condition. A high PRESET-ENABLE signal allows information on the JAM inputs to preset the counter. Anti-lock gating is provided to assure the proper counting sequence. The CD4018B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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