Texas Instruments CDC2536

the cdc2536 is a high-performance low-skew low-jitter clock driver. it uses a phase-lock loop (pll) to precisely align in both frequency and phase the clock output signals to the clock input (clkin) signal. it is specifically designed for use with synchronous drams and popular microprocessors operating at speeds from 50 mhz to 100 mhz or down to 25 mhz on outputs configured as half-frequency outputs. the cdc2536 operates at 3.3-v vcc and is designed to drive a 50-w transmission line. the cdc2536 also provides on-chip series-damping resistors eliminating the need for external termination components. the feedback (fbin) input is used to synchronize the output clocks in frequency and phase to the input clock (clkin). view all in datasheet