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Texas Instruments SN74AS374DWR

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SOIC T/R
$ 1.8

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데이터시트 및 문서

Texas Instruments SN74AS374DWR에 대한 데이터시트 및 제조업체 설명서를 다운로드하세요.

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Datasheet20 페이지18년 전

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재고 내역

3개월간의 트렌드:
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대체 부품

Price @ 1000
$ 1.8
$ 2.43
Stock
218,490
430,092
Authorized Distributors
2
2
Case/Package
SOIC
SOIC
Number of Pins
20
20
Number of Outputs
-
8
Min Input Voltage
-
-
Max Input Voltage
-
-
Max Output Current
-
48 mA
Output Voltage
-
-
Efficiency
-
-
Min Output Voltage
-
-
Max Output Voltage
-
-
Min Operating Temperature
0 °C
0 °C
Max Operating Temperature
70 °C
70 °C

관련 부품

Texas InstrumentsSN74F377ADWR
Octal D-Type Flip-Flop With Clock Enable 20-SOIC 0 to 70
D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20
D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20
Texas InstrumentsSN74F377ADW
TEXAS INSTRUMENTS SN74F377ADW Flip-Flop, D, 6.5 ns, 125 MHz, 20 mA, SOIC, 20 Pins
onsemi74F273SCX
D Flip-Flop, F/FAST Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, TTL, PDSO20
Texas InstrumentsSN74AS574DW
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SOIC Tube

설명

유통업체에서 제공한 Texas Instruments SN74AS374DWR에 대한 설명입니다.

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SOIC T/R
Positive edge 120mA 9ns@ 5V,50pF Non-inverting Tristate,Non-inverting 1 4.5V 5.5V 48mA Standard 74AS parallel/parallel 15mA 125MHz SOIC-20 SMD mount,glue mount 12.8mm*7.52mm*2.35mm
Flip-Flop Logic IC; Logic Family:AS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:20-SOIC; No. of Pins:20; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes
These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE\) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS374A and SN54AS374 are characterized for operation over the full military temperature range of -55C to 125C. The SN74ALS374A and SN74AS374 are characterized for operation from 0C to 70C.

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