Texas Instruments SN74ALVCH16409DLR

Registered Bus Exchanger 1-Element 18-OUT 18-IN 56-Pin SSOP T/R
$ 1.26

가격 및 재고

데이터시트 및 문서

Texas Instruments SN74ALVCH16409DLR에 대한 데이터시트 및 제조업체 설명서를 다운로드하세요.

Texas Instruments

Datasheet14 페이지18년 전

Sierra IC

재고 내역

3개월간의 트렌드:
+0.00%

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대체 부품

Price @ 1000
$ 1.26
$ 0.742
$ 0.742
Stock
124,018
66,818
66,818
Authorized Distributors
2
2
2
Case/Package
SSOP
SSOP
SSOP
Number of Pins
56
56
56
Logic Function
-
-
-
Frequency
-
-
-
Interface
-
-
-
Memory Size
-
-
-
Min Supply Voltage
1.65 V
1.65 V
1.65 V
Max Supply Voltage
3.6 V
3.6 V
3.6 V

관련 부품

Texas InstrumentsSN74LVC16646ADLR
16-Bit Bus Transceiver And Register With 3-State Outputs 56-SSOP -40 to 85
Texas InstrumentsSN74ALVC162835DL
18-Bit Universal Bus Driver With 3-State Outputs 56-SSOP -40 to 85
Texas InstrumentsSN74LVCH16646ADL
16-Bit Bus Transceiver And egister With 3-State Outputs 56-SSOP -40 to 85

설명

유통업체에서 제공한 Texas Instruments SN74ALVCH16409DLR에 대한 설명입니다.

Registered Bus Exchanger 1-Element 18-OUT 18-IN 56-Pin SSOP T/R
BUS EXCHANGER, ALVC/VCX/A SERIES
This 9-bit, 4-port universal bus exchanger is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16409 allows synchronous data exchange between four different buses. Data flow is controlled by the select (SEL0-SEL4) inputs. A data-flow state is stored on the rising edge of the clock (CLK) input if the select-enable (SELEN\) input is low. Once a data-flow state has been established, data is stored in the flip-flop on the rising edge of CLK if SELEN\ is high. The data-flow control logic is designed to allow glitch-free data transmission. When preset (PRE\) transitions high, the outputs are disabled immediately, without waiting for a clock pulse. To leave the high-impedance state, both PRE\ and SELEN\ must be low and a clock pulse must be applied. To ensure the high-impedance state during power up or power down, PRE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

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