Texas Instruments SN74ALS652A-1DW

1 8 4.5V 5.5V 24mA Non-Inverting, Transceiver 15mA SOIC-24 15.4mm*7.52mm*2.35mm
$ 5.325
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데이터시트 및 문서

Texas Instruments SN74ALS652A-1DW에 대한 데이터시트 및 제조업체 설명서를 다운로드하세요.

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대체 부품

Price @ 1000
$ 5.325
$ 5.937
$ 5.937
Stock
74,539
179,244
179,244
Authorized Distributors
3
5
5
Case/Package
SOIC
SOIC
SOIC
Number of Pins
24
24
24
Logic Function
Inverting, Transceiver
Inverting, Transceiver
Inverting, Transceiver
Number of Elements
2
1
1
Number of Bits per Element
8
8
8
Low Level Output Current
48 mA
24 mA
24 mA
High Level Output Current
24 mA
-15 mA
-15 mA
Propagation Delay
30 ns
35 ns
35 ns
Min Supply Voltage
4.75 V
4.5 V
4.5 V
Max Supply Voltage
5.25 V
5.5 V
5.5 V

공급망

Lifecycle StatusProduction (Last Updated: 6 days ago)
Manufacturer Lifecycle StatusACTIVE (Last Updated: 6 days ago)

엔지니어링 리소스

Texas Instruments SN74ALS652A-1DW의 평가 키트와 참조 설계를 확인하세요.

관련 부품

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Texas InstrumentsSN74LS642-1DW
1 8 4.75V 5.25V 48mA Inverting,Transceiver -15mA SOIC-20 12.8mm*7.52mm*2.35mm

설명

유통업체에서 제공한 Texas Instruments SN74ALS652A-1DW에 대한 설명입니다.

1 8 4.5V 5.5V 24mA Non-Inverting,Transceiver 15mA SOIC-24 15.4mm*7.52mm*2.35mm
74ALS652 Tube SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED/REAL TIME DATA Nickel/Palladium/Gold (Ni/Pd/Au) logic driver 15mA 24mA 35ns 2.65mm 5V
These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA\) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select real-time or stored data transfer. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input level selects real-time data, and a high input level selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA\. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. The -1 versions of the SN74ALS651A and SN74ALS652A are identical to the standard versions except that the recommended maximum IOL for the -1 versions is increased to 48 mA. There are no -1 versions of the SN54ALS652, SN54ALS653, SN74ALS653, and SN74ALS654.

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  • SN74ALS652A1DW