Texas Instruments DDC112UK

ADC Single Delta-Sigma 3KSPS 20-Bit Serial 28-Pin SOIC Tube

ADC, Delta-Sigma, 20-Bit, 2 Func, 2 Channel, Serial Access, CMOS, PDSO28

Converters - Analog to Digital (ADC) Dual Current Input 20-Bit

5V 3Ksps 20bit 2 20 SPI Single-Ended 5V Sigma-Delta SOIC-28 18mm*7.52mm*2.35mm

28-SOIC (0.295 7.50mm Width) DDC112 ACTIVE (Last Updated: 5days ago) Simultaneous Sampling analog digital converter 2.35mm 3ksps 130mW 6Weeks

20BIT ADC, DUAL, SMD, SOIC28, 112; Resolution (Bits):20bit; Sampling Rate:3kSPS; Data Interface:Serial; Supply Voltage Range - Analogue:4.75V to 5.25V; Supply Voltage Range - Digital:4.75V to 5.25V; Supply Current:15.2mA; IC Case Style:SOIC; No. of Pins:28; Operating Temperature Range:0°C to +70°C; SVHC:No SVHC (20-Jun-2011); Base Number:112; Digital IC Case Style:SOIC; IC Generic Number:112; IC Temperature Range:Commercial; Input Channel Type:Single Ended; Input Type:Single Ended; Linearity Error:0.025%; Linearity Error ADC / DAC +:1LSB; Linearity Error ADC / DAC -:1LSB; No. of Bits:20; No. of Channels:2; Operating Temperature Max:70°C; Operating Temperature Min:0°C; Package / Case:SOIC; Sample Rate:3kSPS; Sample Rate:3kSPS; Supply Voltage Max:5.25V; Supply Voltage Min:4.75V; Termination Type:SMD

The DDC112 is a dual input, wide dynamic range, charge-digitizing analog-to-digital (A/D) converter with 20-bit resolution. Low-level current output devices, such as photosensors, can be directly connected to its inputs. Charge integration is continuous as each input uses two integrators; while one is being digitized, the other is integrating. For each of its two inputs, the DDC112 combines current-to-voltage conversion, continuous integration, programmable full-scale range, A/D conversion, and digital filtering to achieve a precision, wide dynamic range digital result. In addition to the internal programmable full-scale ranges, external integrating capacitors allow an additional user-settable full-scale range of up to 1000pC. To provide single-supply operation, the internal A/D converter utilizes a differential input, with the positive input tied to VREF. When the integration capacitor is reset at the beginning of each integration cycle, the capacitor charges to VREF. This charge is removed in proportion to the input current. At the end of the integration cycle, the remaining voltage is compared to VREF. The high-speed serial shift register which holds the result of the last conversion can be configured to allow multiple DDC112 units to be cascaded, minimizing interconnections. The DDC112 is available in a SO-28 or TQFP-32 package and is offered in two performance grades.