STMicroelectronics M74HC161B1R

74HC Series 6 V Synchronous Presettable 4 Bit Binary Counter Through Hole-DIP-16
Obsolete

가격 및 재고

데이터시트 및 문서

STMicroelectronics M74HC161B1R에 대한 데이터시트 및 제조업체 설명서를 다운로드하세요.

IHS

Datasheet12 페이지15년 전

Mouser

SHENGYU ELECTRONICS

RS (Formerly Allied Electronics)

Future Electronics

대체 부품

Price @ 1000
$ 0.376
$ 0.376
Stock
192,388
226,885
226,885
Authorized Distributors
1
5
5
Case/Package
DIP
PDIP
PDIP
Number of Pins
16
16
16
Logic Function
Counter
Counter
Counter
Direction
Up
Unidirectional
Unidirectional
Number of Elements
1
1
1
Number of Bits per Element
4
4
4
Reset
Asynchronous
Asynchronous
Asynchronous
Clock Edge Trigger Type
Positive Edge
Positive Edge
Positive Edge
Frequency
21 MHz
44 MHz
44 MHz
Min Supply Voltage
2 V
2 V
2 V
Max Supply Voltage
6 V
6 V
6 V

공급망

Harmonized Tariff Schedule (HTS) Code8542.39.00.60
Introduction Date1980-01-04
Lifecycle StatusObsolete (Last Updated: 3 months ago)

관련 부품

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COUNTER, SYNCHRONOUS BINARY; 4 BIT SYNCHRONOUS BINARY COUNTER; 0 TO 5 V; PDIP
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Counter; 4-Bit Synchronous Binary Counters; 0 to 5 V; 500 ns @ 4.5 V; PDIP
DUAL Positive Edge Asynchronous Synchronous Binary Counter IC 50pF -40C~85C 167MHz 5V
onsemi74VHC161N
Positive Edge Asynchronous Synchronous Up Binary Counter IC -40C~85C 125MHz 2V~5.5V 2007
Binary Counter, AC Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, CMOS, PDIP16

설명

유통업체에서 제공한 STMicroelectronics M74HC161B1R에 대한 설명입니다.

74HC Series 6 V Synchronous Presettable 4 Bit Binary Counter Through Hole-DIP-16
Binary Counter, HC/UH Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, CMOS, PDIP16
Synchronous Presettable 4-Bit Counter; Logic Type:Counter; Logic Family:HC; Supply Voltage Min:2V; Supply Voltage Max:6V; Package/Case:16-DIP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; IC Generic Number:74HC161 ;RoHS Compliant: Yes
The M74HC161 is an high speed CMOSSYNCHRONOUS 4-BIT BINARY PRESETTABLE COUNTER fabricated with silicon gate C2MOS technology. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active LOW. Presetting is synchronous on the rising edge of the clock, the function is cleared asynchronously. Two enable inputs (TE and PE) and Carry output are provided to enable easy cascading of counters, which facilities easy implementation of N-bit counters without using external gates. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

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