The NB7L32M is an integrated /2 divider with differential clock inputs and asynchronous reset. Differential clock inputs incorporate internal 50 O termination resistors and accept LVPECL (Positive ECL) CML or LVDS. The high frequency reset pin is asserted on the rising edge. Upon power-up the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple NB7L32Ms in a system. The differential 16 mA CML output provides matching internal 50 O termination which guarantees 400 mV output swing when externally receiver terminated 50 O to VCC (See Figure 16). The device is housed in a small 3x3 mm 16 pin QFN package.