This P-Channel logic level enhancement mode field effect transistor is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, this one P-channel FET can replace several digital transistors with different bias resistors such as the DTCx and DCDx series.
MOSFET, P, DIGITAL, SOT-23; Transistor Polarity:P Channel; Continuous Drain Current Id:120mA; Drain Source Voltage Vds:25V; On Resistance Rds(on):13ohm; Rds(on) Test Voltage Vgs:2.7V; Threshold Voltage Vgs Typ:-1V; Power Dissipation Pd:350mW; Transistor Case Style:SOT-23; No. of Pins:3; SVHC:No SVHC (20-Jun-2011); Current Id Max:120mA; Current Temperature:25°C; ESD HBM:6kV; External Depth:2.5mm; External Length / Height:1.12mm; External Width:3.05mm; Full Power Rating Temperature:25°C; No. of Transistors:1; Package / Case:SOT-23; Power Dissipation Pd:350mW; Power Dissipation Pd:350mW; Pulse Current Idm:500mA; SMD Marking:302P; Tape Width:8mm; Termination Type:SMD; Voltage Vds Typ:-25V; Voltage Vgs Max:-1V; Voltage Vgs Rds on Measurement:-4.5V; Voltage Vgs th Max:-1.5V