Texas Instruments TLC3548IPW

ADC Single SAR 200KSPS 14-Bit Serial 24-Pin TSSOP Tube
$ 34.075
Production

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データシート & ドキュメント

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Farnell

Datasheet46ページ11年前
Datasheet46ページ10年前
Datasheet45ページ14年前
Datasheet42ページ17年前

Texas Instruments

Mouser

Newark

element14 APAC

在庫履歴

3か月間の傾向:
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代替部品

Price @ 1000
$ 34.075
$ 23.396
$ 23.396
Stock
105,146
123,856
123,856
Authorized Distributors
2
2
2
Case/Package
TSSOP
TSSOP
TSSOP
Number of Pins
24
24
24
Number of Bits
14
14
14
Sampling Rate
200 ksps
200 ksps
200 ksps
Polarity
Unipolar
Unipolar
Unipolar
Interface
SPI
SPI
SPI
Integral Nonlinearity (INL)
1 LSB
1 LSB
1 LSB
Differential Nonlinearity
-
-
-
Number of A/D Converters
1
1
1
Min Supply Voltage
4.5 V
4.5 V
4.5 V
Max Supply Voltage
5.5 V
5.5 V
5.5 V

サプライチェーン

Lifecycle StatusProduction (Last Updated: 2 years ago)
Manufacturer Lifecycle StatusACTIVE (Last Updated: 1 day ago)

関連部品

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説明

Texas Instruments TLC3548IPWの詳細は販売業者から提供されます。

ADC Single SAR 200KSPS 14-Bit Serial 24-Pin TSSOP Tube
Converters - Analog to Digital (ADC) 14-bit, 5V, 200KSPS 8-Channel Unipolar
5V 81dB 200Ksps 14bit 8 14 SPI Pseudo-Differential,Single-Ended 2.7V~5.5V SAR TSSOP-24 7.8mm*4.4mm*1mm
24-TSSOP (0.173 4.40mm Width) TLC3548 ACTIVE (Last Updated: 3days ago) Nickel/Palladium/Gold (Ni/Pd/Au) analog digital converter 1mm 2.8mA 200ksps 20mW
The TLC3544 and TLC3548 are a family of 14-bit resolution high-performance, low-power, CMOS analog-to-digital converters (ADC). All devices operate from a single 5-V analog power supply and 3-V to 5-V digital supply. The serial interface consists of four digital inputs [chip select (CS\), frame sync (FS), serial input-output clock (SCLK), serial data input (SDI)], and a 3-state serial data output (SDO). CS\ (works as SS\, slave select), SDI, SDO, and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form a DSP interface. The frame sync signal (FS) indicates the start of a serial data frame being transferred. When multiple converters connect to one serial port of a DSP, CS\ works as the chip select to allow the host DSP to access the individual converter. CS\ can be tied to ground if only one converter is used. FS must be tied to DVDD if it is not used (such as in an SPI interface). When SDI is tied to DVDD, the device is set in hardware default mode after power-on, and no software configuration is required. In the simplest case, only three wires (SDO, SCLK, and CS\ or FS) are needed to interface with the host. In addition to being a high-speed ADC with versatile control capability, these devices have an on-chip analog multiplexer (MUX) that can select any analog input or one of three self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK (normal sampling) or can be controlled by CSTART\ to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short sampling (12 SCLKs) or long sampling (44 SCLKs) to accommodate the faster SCLK operation popular among high-performance signal processors. The TLC3544 and TLC3548 are designed to operate with low power consumption. The power saving feature is further enhanced with software power-down/ autopower-down modes and programmable conversion speeds. The conversion clock (internal OSC) is built in. The converter can also use an external SCLK as the conversion clock for maximum flexibility. The TLC3544 and TLC3548 have a 4-V internal reference. The converters are specified with unipolar input range of 0-V to 5-V when a 5-V external reference is used.

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部品番号の別名

こちらの部品は、以下の代替部品番号で知られている場合があります:

  • TLC3548IPW.