Texas Instruments SN74AS181ANT

Arithmetic Logic Unit 4-Bit 1-Element Bipolar 24-Pin PDIP Tube
$ 11.317

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データシート & ドキュメント

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Texas Instruments

Datasheet22ページ18年前

Newark

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代替部品

Price @ 1000
$ 11.317
$ 6.289
$ 6.289
Stock
51,168
83,645
83,645
Authorized Distributors
2
2
2
Case/Package
PDIP
DIP
DIP
Number of Pins
24
24
24
Logic Function
-
-
-
Frequency
-
-
-
Interface
-
-
-
Memory Size
-
-
-
Min Supply Voltage
4.5 V
4.5 V
4.5 V
Max Supply Voltage
5.5 V
5.5 V
5.5 V

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説明

Texas Instruments SN74AS181ANTの詳細は販売業者から提供されます。

Arithmetic Logic Unit 4-Bit 1-Element Bipolar 24-Pin PDIP Tube
IC ARITHMETIC LOGIC UNIT 24PDIP
4 BIT ALU/FUNCTION GENERATOR, 21NS DIP24
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS
The SN54AS181B and SN74AS181A arithmetic logic units (ALUs)/function generators have a complexity of 75 equivalent gates on a monolithic chip. These circuits perform 16 binary arithmetic operations on two 4-bit words as shown in Tables1 and 2. These operations are selected by the four function-select (S0, S1, S2, and S3) lines and include addition, subtraction, decrement, and straight transfer. When performing arithmetic manipulations, the internal carries are enabled by applying a low-level voltage to the mode-control (M) input. A full carry look-ahead scheme is used to generate fast, simultaneous carry by means of two cascade (G\ and P\) outputs for the four bits in the package. If high speed is not important, a ripple-carry (Cn) input and a ripple-carry (Cn + 4) output are available. The ripple-carry delay is minimized so that arithmetic manipulations for small word lengths can be performed without external circuitry. The SN54AS181B and SN74AS181A accommodate active-high or active-low data if the pin designations are interpreted as follows: Subtraction is accomplished by 1's complement addition where the 1's complement of the subtrahend is generated internally. The resultant output is A-B-1, which requires an end-around or forced carry to provide A-B. The SN54AS181B and SN74AS181A also can be used as comparators. The A = B output is internally decoded from the function (F0, F1, F2, F3) outputs so that when two words of equal magnitude are applied at the A and B inputs, the output assumes a high level to indicate equality (A = B). The ALU must be in the subtract mode with Cn = H when performing this comparison. The A = B output is open collector so that it can be wire-AND connected to give a comparison for more than four bits. Cn + 4 also can be used to supply relative magnitude information. The ALU must be placed in the subtract mode by placing the function-select inputs S3, S2, S1, and S0 at L, H, H, and L, respectively. These circuits not only incorporate all of the designer's requirements for arithmetic operations, but also provide 16 possible functions of two Boolean variables without using external circuitry. These logic functions are selected by the four function-select inputs with M at a high level to disable the internal carry. The 16 logic functions are detailed in Tables 1 and 2 and include exclusive-OR, NAND, AND, NOR, and OR functions. The SN54AS181B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS181A is characterized for operation from 0°C to 70°C.

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