Texas Instruments SN74AS169AD

Counter Single 4-Bit Sync Binary UP/Down 16-Pin SOIC Tube
$ 2.88

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Datasheet19ページ18年前

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代替部品

Price @ 1000
$ 2.88
$ 2.88
Stock
99,329
101,582
Authorized Distributors
2
2
Case/Package
SOIC
SOIC
Number of Pins
16
16
Logic Function
Counter
Counter
Direction
-
-
Number of Elements
1
1
Number of Bits per Element
4
4
Reset
-
-
Clock Edge Trigger Type
Positive Edge
Positive Edge
Frequency
75 MHz
75 MHz
Min Supply Voltage
-
-
Max Supply Voltage
-
-

関連部品

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400ns,200ns,180ns 1 1 3V 18V Binary Counter,Decade 4000 SOIC-16 , 4mm*1.5mm
74AC Series 2 to 6 V Synchronous Presettable Binary Counter - SOIC-16
Counter/Divider Single 4-Bit Octal UP 16-Pin SOIC Rail

説明

Texas Instruments SN74AS169ADの詳細は販売業者から提供されます。

Counter Single 4-Bit Sync Binary UP/Down 16-Pin SOIC Tube
LOGIC, SYNC UP/DN BIN CNTR, 16SOIC; Logic IC Function:4-Bit Synchronous Up-Down Binary Presettable Counter; Logic IC Family:AS; Logic IC Base Number:74169; Max Clock Frequency:75MHz; Max Count:16; Min Supply Voltage:4.5V; Max Supply Voltage:5.5V; Case Style:SOIC; Operating Temperature Range:0°C to +70°C; No. of Pins:16; Termination Type:SMD
These synchronous 4-bit up/down binary presettable counters feature an internal carry look-ahead circuitry for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (, ) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform. These counters are fully programmable; that is, they may be preset to either level. The load-input circuitry allows loading with the carry-enable output of cascaded counters. Because loading is synchronous, setting up a low level at the load (LOAD\) input disables the counter and causes the outputs to agree with the data inputs after the next clock pulse. The internal carry look-ahead circuitry provides for cascading counters for n-bit synchronous application without additional gating. and inputs and a ripple-carry output () are instrumental in accomplishing this function. Both and must be low to count. The direction of the count is determined by the level of the up/down (U/D\) input. When U/D\ is high, the counter counts up; when low, it counts down. is fed forward to enable . , thus enabled, produces a low-level pulse while the count is zero (all inputs low) counting down or maximum (15) counting up. This low-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at or are allowed regardless of the level of the clock input. All inputs are diode clamped to minimize transmission-line effects, thereby simplifying system design. These counters feature a fully independent clock circuit. Changes at control inputs (, , , or U/D\) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times. The SN54ALS169B and SN54AS169A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS169B and SN74AS169A are characterized for operation from 0°C to 70°C.

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