IC, DELAY LINE PROGRAMMABLE; No. of Taps:1024; Delay Time per Tap:2.4ns; Total Delay Time:12.4ns; Supply Voltage Range:3V to 3.6V; Operating Temperature Range:-40°C to +85°C; Digital IC Case Style:LQFP; No. of Pins:32; SVHC:No SVHC (19-Dec-2011); Frequency:1.2GHz; Logic IC Family:100EP; Logic IC Function:Programmable Delay Chip; Package / Case:LQFP; Supply Voltage Max:3.6V; Supply Voltage Min:3V; Termination Type:SMD
The MC100EP196 is a programmable delay chip (PDC) designed primarily for clock deskewing and timing adjustment. It provides programmably variable delay of a differential ECL input signal. It has similar architecture to the EP195 with the added feature of further tuneability in delay using the FTUNE pin. The FTUNE input takes an analog voltage from VCC to VEE to fine tune the output delay from 0 to 60 ps.