onsemi 74VHC74MX

74VHC Series High Speed CMOS Dual D-Type Flip-Flop w/ Preset and Clear - SOIC-14
$ 0.211
Obsolete

価格と在庫

データシート & ドキュメント

onsemi 74VHC74MXのデータシートとメーカー資料をダウンロードする。

IHS

Datasheet7ページ4年前
Datasheet0ページ0年前

Farnell

onsemi

Fairchild Semiconductor

Augswan

在庫履歴

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代替部品

Price @ 1000
$ 0.211
$ 0.212
$ 0.212
Stock
537,401
1,323,544
1,323,544
Authorized Distributors
5
5
5
Case/Package
SOP
SOP
SOP
Number of Pins
14
14
14
Logic Function
AND, D-Type, Flip-Flop
AND, D-Type, Flip-Flop
AND, D-Type, Flip-Flop
Number of Elements
2
2
2
Number of Bits per Element
1
1
1
Propagation Delay
10.5 ns
10.5 ns
10.5 ns
Frequency
75 MHz
75 MHz
75 MHz
Clock Edge Trigger Type
Positive Edge
Positive Edge
Positive Edge
Min Supply Voltage
2 V
2 V
2 V
Max Supply Voltage
5.5 V
5.5 V
5.5 V
Quiescent Current
2 µA
2 µA
2 µA

サプライチェーン

Country of OriginThailand
Export Control Classification Number (ECCN) CodeEAR99
Harmonized Tariff Schedule (HTS) Code8542.39.00.01
Introduction Date1988-01-01
Lifecycle StatusObsolete (Last Updated: 6 days ago)
LTB Date2022-04-01
LTD Date2022-10-01
Manufacturer Lifecycle StatusOBSOLETE (Last Updated: 6 days ago)

関連部品

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74VHC Series Dual Type-D Flip-Flop with Set and Reset SMT - SOIC 14
onsemi74VHC74M
74VHC Series High Speed CMOS Dual D-Type Flip-Flop w/ Preset and Clear - SOIC-14
Texas InstrumentsSN74AC74D
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SOIC -40 to 85
Texas InstrumentsSN74AC74DR
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SOIC -40 to 85
onsemi74LVX74M
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop | IC FF D-TYPE DUAL 1BIT 14SOIC

説明

onsemi 74VHC74MXの詳細は販売業者から提供されます。

74VHC Series High Speed CMOS Dual D-Type Flip-Flop w/ Preset and Clear - SOIC-14
Tape & Reel (TR) 74VHC74 e4 74VHC flip flop 150mg 2V 9.3ns @ 5V 50pF 115MHz
Flip Flop D-Type Positive Edge 2-Element 14-Pin SOIC N
The VHC74 is an advanced high speed CMOS Dual D-Type Flip-Flop fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D input is transferred to the Q output during the positive going transition of the CK pulse. CLR# and PR# are independent of the CK and are accomplished by setting the appropriate input LOW. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages.

メーカーの別名

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  • ON Semi - ON Semiconductor
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