Texas Instruments SN74AS646DWR

IC TXRX NON-INVERT 5.5V 24SOIC / Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 24-SOIC
$ 5.423
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Texas Instruments

Datasheet28 pagine18 anni fa

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Parti alternative

Price @ 1000
$ 5.423
$ 8.038
$ 8.038
Stock
78,215
120,632
120,632
Authorized Distributors
2
3
3
Case/Package
SOIC
SOIC
SOIC
Number of Pins
24
24
24
Logic Function
Inverting, Transceiver
Inverting, Transceiver
Inverting, Transceiver
Number of Elements
1
1
1
Number of Bits per Element
8
8
8
Low Level Output Current
48 mA
15 mA
15 mA
High Level Output Current
48 mA
48 mA
48 mA
Propagation Delay
9 ns
9 ns
9 ns
Min Supply Voltage
4.5 V
4.5 V
4.5 V
Max Supply Voltage
5.5 V
5.5 V
5.5 V

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Descrizioni

Descrizioni di Texas Instruments SN74AS646DWR fornite dai suoi distributori.

IC TXRX NON-INVERT 5.5V 24SOIC / Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 24-SOIC
Transceiver Logic IC; Logic Family:AS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:24-SOIC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
These devices consist of bus-transceiver circuits with 3-state or open-collector outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers. Output-enable () and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either or both registers. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when is low. In the isolation mode ( high), A data may be stored in one register and/or B data may be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The -1 version of the SN74ALS646A is identical to the standard version, except that the recommended maximum IOL in the -1 version is increased to 48 mA. There are no -1 versions of the SN54ALS646, SN54ALS648, or SN74ALS648A. The SN54ALS646, SN54ALS648, and SN54AS646 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS646A, SN74ALS648A, SN74AS646, and SN74AS648 are characterized for operation from 0°C to 70°C.

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