onsemi MC74ACT377DWG

D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20
$ 0.458
Obsolete
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Schede tecniche e documenti

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IHS

Datasheet10 pagine11 anni fa

SHENGYU ELECTRONICS

onsemi

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Parti alternative

Price @ 1000
$ 0.458
$ 0.47
$ 0.47
Stock
181,440
512,064
512,064
Authorized Distributors
6
6
6
Case/Package
SOP
SOP
SOP
Number of Pins
20
20
20
Logic Function
D-Type, Flip-Flop
D-Type, Flip-Flop
D-Type, Flip-Flop
Number of Elements
1
1
1
Number of Bits per Element
8
8
8
Propagation Delay
11 ns
12 ns
12 ns
Frequency
125 MHz
125 MHz
125 MHz
Clock Edge Trigger Type
Positive Edge
Positive Edge
Positive Edge
Min Supply Voltage
4.5 V
4.5 V
4.5 V
Max Supply Voltage
5.5 V
5.5 V
5.5 V
Quiescent Current
-
8 µA
8 µA

Supply Chain

Country of OriginPhilippines
Harmonized Tariff Schedule (HTS) Code8542.39.00.60
Introduction Date1996-04-09
Lifecycle StatusObsolete (Last Updated: 3 days ago)
LTB Date2022-01-08
LTD Date2022-07-08
Manufacturer Lifecycle StatusOBSOLETE (Last Updated: 3 days ago)

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Octal D-Type Flip-Flop With Clock Enable 20-SOIC 0 to 70
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TEXAS INSTRUMENTS SN74F377ADW Flip-Flop, D, 6.5 ns, 125 MHz, 20 mA, SOIC, 20 Pins
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Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85

Descrizioni

Descrizioni di onsemi MC74ACT377DWG fornite dai suoi distributori.

D Flip-Flop, ACT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20
Flip Flop D-Type Bus Interface Pos-Edge 1-Element 20-Pin SOIC W Tube
8¦ÌA 10ns@ 5V,50pF 1 4.5V 5.5V 24mA Standard ACT 4.5pF 24mA 140MHz SOIC-20 12.95mm*7.6mm*2.4mm
Flip Flop, 74AC377, D, 9 ns, 140 MHz, 24 mA, 20 Pins, WSOIC
MC74ACT377DWG, LOG CMOS D FLIP FLOP OCTL | ON Semiconductor MC74ACT377DWG
Flip-Flop, D-Type, Octal, 9Ns, Soic-20; Logic Family / Base Number:74Act377; Flip-Flop Type:d; Propagation Delay:9Ns; Frequency:140Mhz; Output Current:-; Logic Case Style:soic; No. Of Pins:20Pins; Trigger Type:positive Edge; Ic Rohs Compliant: Yes
The MC74AC377/74ACT377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input one setup time before the LOW-to-HIGH clock transition is transferred to the corresponding flipflops Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation.

Alias del produttore

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  • ON Semiconductor
  • ONS
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  • ON SEM
  • ON SEMICONDUCTO
  • ON SEMICONDUCTORS
  • ONSEMIC
  • ON Semicondu
  • OSC
  • ONSE
  • ON SEMICOND
  • ON Semiconductor / Fairchild
  • SCG
  • ON Semiconductor Cor
  • ON SEMICO
  • ONSM
  • ON SEMICONDUCTOR CORP
  • onsemi / Fairchild
  • MOT/ON SEMI
  • Fairchild/ONSemiconductor
  • ON Semiconductor Corporation
  • ON4
  • ON Semi - ON Semiconductor
  • ON SEMICONDUCT
  • ON-SEMI SCG
  • ON Semiconductor Inc.
  • onsemiconductor
  • On Semiconductor Ltd