Texas Instruments CD4510BPWG4

IC PRESET BCD UP/DN CONV 16TSSOP / Counter IC BCD Counter 1 Element 4 Bit Positive Edge 16-TSSOP

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Texas Instruments

Datasheet15 páginasHace 18 años

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Componentes alternativos

Este componente
Componentes alternativos
Price @ 1000
$ 0.247
Stock
32,197
187,007
Authorized Distributors
0
4
Case/Package
TSSOP
TSSOP
Number of Pins
16
16
Logic Function
Counter
Counter
Direction
-
Bidirectional
Number of Elements
1
1
Number of Bits per Element
4
4
Reset
Asynchronous
Asynchronous
Clock Edge Trigger Type
Positive Edge
Positive Edge
Frequency
11 MHz
11 MHz
Min Supply Voltage
-
3 V
Max Supply Voltage
-
18 V

Descripciones

Descripciones de Texas Instruments CD4510BPWG4 suministradas por sus distribuidores.

IC PRESET BCD UP/DN CONV 16TSSOP / Counter IC BCD Counter 1 Element 4 Bit Positive Edge 16-TSSOP
Counter Logic IC; Logic Family:CD4000; Supply Voltage Min:3V; Supply Voltage Max:18V; Package/Case:16-TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; Input Type:CMOS; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
CD4510B Presettable BCD Up/Down Counter and the CD4516 Presettable Binary Up/Down Counter consist of four synchronously clocked D-type flip-flops (with a gating structure to provide T-type flip-flop capability) connected as counters. These counters can be cleared by a high level on the RESET line, and can be preset to any binary number present on the jam inputs by a high level on the PRESET ENABLE line. The CD4510B will count out of non-BCD counter states in a maximum of two clock pulses in the up mode, and a maximum of four clock pulses in the down mode. If the CARRY-IN input is held low, the counter advances up or down on each positive-going clock transition. Synchronous cascading is accomplished by connecting all clock inputs in parallel and connecting the CARRY-OUT of a less significant stage to the CARRY-IN of a more significant stage. The CD4510B and CD4516B can be cascaded in the ripple mode by connecting the CARRY-OUT to the clock of the next stage. If the UP/DOWN input changes during a terminal count, the CARRY-OUT must be gated with the clock, and the UP/DOWN input must change while the clock is high. This method provides a clean clock signal to the subsequent counting stage. (See Fig.15). These devices are similar to types MC14510 and MC14516. The CD4510B and CD4516B types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). The CD4516B types also are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix).

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