Texas Instruments SN74AS823ANT

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 24-Pin PDIP Tube
$ 7.133
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Texas Instruments

Datasheet14 SeitenVor 15 Jahren
Official datasheet0 SeitenVor 0 Jahren
Technical Drawing2 SeitenVor 17 Jahren
Datasheet16 SeitenVor 18 Jahren

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Alternative Teile

Price @ 1000
$ 7.133
$ 46.48
$ 46.48
Stock
91,003
28,334
28,334
Authorized Distributors
2
3
3
Case/Package
PDIP
CDIP
CDIP
Number of Pins
24
24
24
Logic Function
D-Type, Flip-Flop
D-Type
D-Type
Number of Elements
1
1
1
Number of Bits per Element
9
-
-
Propagation Delay
13 ns
16.5 ns
16.5 ns
Frequency
-
-
-
Clock Edge Trigger Type
Positive Edge
Positive Edge
Positive Edge
Min Supply Voltage
4.5 V
4.5 V
4.5 V
Max Supply Voltage
5.5 V
5.5 V
5.5 V
Quiescent Current
-
-
-

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Beschreibungen

Beschreibungen von Texas Instruments SN74AS823ANT, die von den Distributoren bereitgestellt werden.

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 24-Pin PDIP Tube
Tube e4 74AS NICKEL PALLADIUM GOLD flip flop 5.08mm 4.5V 13ns @ 5V 50pF 4.5V~5.5V
LOGIC, FLIP FLOP BUS 9B 3ST, 24PDIP; Flip-Flop Type:D; Propagation Delay:7.5ns; Output Current:48mA; Trigger Type:Positive Edge; IC Output Type:Tri State Non Inverted; Supply Voltage Range:4.5V to 5.5V; Logic Case Style:DIP; No. of Pins:24; Operating Temperature Range:0°C to +70°C; SVHC:No SVHC (20-Jun-2011); Logic IC Base Number:74823; Logic IC Family:AS; Logic IC Function:9-Bit Bus-Interface Flip-Flop with 3-State Outputs; Output Type:Tri State Non Inverted; Package / Case:PDIP; Supply Voltage Max:5.5V; Supply Voltage Min:4.5V; Termination Type:Through Hole
These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers, parity bus interfacing, and working registers. With the clock-enable () input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock (CLK) input. Taking high disables the clock buffer, latching the outputs. The SN54AS823A and SN74AS823A have noninverting data (D) inputs and the SN74AS824A has inverting (D\) inputs. Taking the clear () input low causes the nine Q outputs to go low independently of the clock. A buffered output-enable () input can be used to place the nine outputs in either a normal logic state (high or low logic level) or the high- impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54AS823A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS823A and SN74AS824A are characterized for operation from 0°C to 70°C.

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Aliasnamen für Teilnummern

Dieses Teil ist möglicherweise auch unter diesen alternativen Teilenummern bekannt:

  • SN74AS823 ANT