onsemi NB100LVEP91DWG

NB100L Series 2.5V/3.3V Input to -2.5V/-3.3V LVNECL Output Translator SOIC-20
$ 16.264
Production
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IHS

Datasheet12 SeitenVor 5 Jahren

RS (Formerly Allied Electronics)

SHENGYU ELECTRONICS

Master Electronics

Newark

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Alternative Teile

Price @ 1000
$ 16.264
$ 15.89
$ 15.89
Stock
185,348
122,906
122,906
Authorized Distributors
6
6
6
Case/Package
SOP
SOP
SOP
Number of Pins
20
20
20
Logic Function
Translator
Translator
Translator
Number of Channels
3
3
3
Propagation Delay
650 ps
650 ps
650 ps
Data Rate
2 Gbps
2 Gbps
2 Gbps
Low Level Output Current
50 mA
50 mA
50 mA
High Level Output Current
-50 mA
-50 mA
-50 mA
Min Supply Voltage
2.375 V
2.375 V
2.375 V
Max Supply Voltage
3.8 V
3.8 V
3.8 V
Quiescent Current
-
-
-

Lieferkette

Country of OriginPhilippines
Export Control Classification Number (ECCN) CodeEAR99
Harmonized Tariff Schedule (HTS) Code8542.39.00.60
Introduction Date2002-12-01
Lifecycle StatusProduction (Last Updated: 5 years ago)
Manufacturer Lifecycle StatusACTIVE (Last Updated: 5 years ago)

Verwandte Teile

Translator HSTL/LVCMOS/CML/LVDS/LVPECL/LVTTL to NECL 3-CH Unidirectional 20-Pin SOIC W T/R
MC100LVEL90 Series 700 MHz 3.8 V ECL Input to LVPECL Output Translator SOIC-20
MC100LVEL91 SeriesTriple LVPECL Input to -3.3Vto-5 V ECL OutputTranslatorSOIC-20

Beschreibungen

Beschreibungen von onsemi NB100LVEP91DWG, die von den Distributoren bereitgestellt werden.

NB100L Series 2.5V/3.3V Input to -2.5V/-3.3V LVNECL Output Translator SOIC-20
IC, TRIPLE ANY LOGIC TRANSLATOR, SOIC-20; No. of Inputs:3; Output Current:50mA; Propagation Delay:500ps; Logic Type:Level Translator; Supply Voltage Range:2.375V to 3.8V; Logic Case Style:SOIC; No. of Pins:20
Triple Any Logtranslator, Soic-20; Núm. De Entradas:3; Corriente De Salida:50Ma; Retardo De Propagación:500Ps; Núm. De Contactos:20; Circuito Lógico, Tipo:Soic; Tensión De Alimentación Mín.:2.375V; Tensión De Alimentación Máx.:3.8V |Onsemi NB100LVEP91DWG
The NB100LVEP91 is a triple input to NECL output translator. The device accepts LVPECL LVTTL HSTL CML or LVDS signals and translates them to differential -2.5 V / -3.3 V NECL output signals. To accomplish the level translation the LVEP91 requires three power rails. The VCC supply should be connected to the positive supply and the VEE pin should be connected to the negative power supply. The GNDI pins are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01 uF capacitors. Under open input conditions the Dbar input will be biased at VCC/2 and the D input will be pulled to GND. This condition will force the Q output to a low ensuring stability. The VBB pin an internally generated voltage supply is available to this device only. For single-ended input conditions the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used decouple VBB and VCC via a 0.01 uF capacitor and limit current sourcing or sinking to 0.5 mA. When not used VBB should be left open.

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  • ON Semiconductor / Fairchild
  • SCG
  • ON Semiconductor Cor
  • ON SEMICO
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  • ON SEMICONDUCTOR CORP
  • onsemi / Fairchild
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  • Fairchild/ONSemiconductor
  • ON Semiconductor Corporation
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  • ON Semi - ON Semiconductor
  • ON SEMICONDUCT
  • ON-SEMI SCG
  • ON Semiconductor Inc.
  • onsemiconductor
  • On Semiconductor Ltd