Texas Instruments SN74LS652

these devices consist of bus transceiver circuits d-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. enable gab and g\ba are provided to control the transceiver functions. sab and sba control pins are provided to select whether realtime or stored data is transferred. a low input level selects real-time data and a high selects stored data. the following examples demonstrate the four fundamental bus-management functions that can be performed with the ls651 ls652 and ls653. data on the a or b data bus or both can be stored in the internal d flip-flop by low-to-high transitions at the appropriate clock pins (cab or cba) regardless of the select or enable control pins. view all in datasheet