these 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. they are particularly suitable for implementing buffer registers i/o ports bidirectional bus drivers and working registers. the eight latches of the f573 are transparent d-type latches. while the latch enable (le) input is high the q outputs follow the data (d) inputs. when the latch enable is taken low the q outputs are latched at the logic levels set up at the d inputs. a buffered output enable input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high- impedance state. in the high-impedance state the outputs neither load nor drive the bus lines significantly. view all in datasheet