these devices consist of bus-transceiver circuits d-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. output-enable (oeab and oeba\) inputs are provided to control the transceiver functions. select-control (sab and sba) inputs are provided to select real-time or stored data transfer. the circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. a low input level selects real-time data and a high input level selects stored data. figure 1 illustrates the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers data on the a or b data bus or both can be stored in the internal d-type flip-flops by low-to-high transitions at the appropriate clock (clkab or clkba) terminals regardless of the select- or output-control terminals. view all in datasheet