these low-power schottky eight-bit universal registers feature multiplexed inputs/outputs to achieve full eight-bit data handling in a single 20-pin package. two function-select inputs and two output-control inputs can be used to choose the modes of operation listed in the function table. synchronous parallel loading is accomplished by taking both function-select lines s0 and s1 high. this places the three-state outputs in a high-impedance state which permits data that is applied on the input/output lines to be clocked into the register. reading out of the register can be accomplished while the outputs are enabled in any mode. the clear function is synchronous and a low level at the clear input clears the register on the next low-to-high transition of the clock. view all in datasheet