the cdcs503 is a spread spectrum capable lvcmos input clock buffer with selectable frequency multiplication. it shares major functionality with the cdcs502 but utilizes a lvcmos input stage instead of the crystal input stage of the cdcs502. also an output enable pin has been added to the cdcs503. the device accepts a 3.3v lvcmos signal at the input. the input signal is processed by a pll whose output frequency is either equal to the input frequency or multiplied by the factor of 4. the pll is also able to spread the clock signal by 0% 0.5% 1% or 2% centered around the output clock frequency with a triangular modulation. by this the device can generate output frequencies between 8mhz and 108mhz with or without ssc. view all in datasheet