供应链
Export Control Classification Number (ECCN) CodeEAR99
Harmonized Tariff Schedule (HTS) Code8542.31.00.55
Introduction Date1995-05-01
Lifecycle StatusObsolete (Last Updated: 4 months ago)
LTB Date2015-12-23
LTD Date2016-12-30
描述
由其分销商提供的 Lattice Semiconductor M4A3-32/32-7JC 的描述。
CPLD ispMACH 4A Family 1.25K Gates 32 Macro Cells 105MHz/125MHz 3.3V 44-Pin PLCC Tube
PLCC-44(16.6x16.6) Programmable Logic Device (CPLDs/FPGAs) ROHS
Complex Programmable Logic Devices - CPLDs HI PERF E2CMOS PLD
YES 44-LCC (J-Lead) 1998 M4A3-32 complex programmable logic device 125MHz 16.5862mm 7.5ns 3V~3.6V
EE PLD, 7.5ns, 32-Cell, CMOS, PQCC44
制造商别名
Lattice Semiconductor 在全球拥有多个品牌，分销商可将其用作替代名称。Lattice Semiconductor 也可称为以下名称：
- LATTICE
- Lattice Semiconductor Corporation
- LAT
- LATT
- LATTIC
- LATTICE SEMI
- LATTICE SEMICONDUCTOR CORP
- LATICE
- LATTICE SEMICONDUCTO
- LATTI
- LATTICE SEMICON
- LITTICE
- LSD
- LATTICE SEMICONDUC
- SAL
- ALTT
- LATTICE SEMICONDUCTOR COR
- Lattice Semiconductor Corporat
- Carley
- LATTICE/A
- LATTICE/S
- LATTICE MIL
- LTTCE
- Lattice / ORCA
- Lattice Semiconductors
技术规格
Physical
Case/PackagePLCC
MountSurface Mount
Number of Pins44
Number of Terminals44
Technical
Max Frequency76.9 MHz
Max Operating Temperature70 °C
Max Supply Voltage3.6 V
Memory TypeEEPROM
Min Operating Temperature0 °C
Min Supply Voltage3 V
Number of Gates1250
Number of I/Os32
Number of Inputs32
Number of Macrocells32
Number of Outputs32
Number of Programmable I/O97
Operating Supply Voltage3.3 V
Propagation Delay7.5 ns
Temperature GradeCommercial
Turn-On Delay Time7.5 ns
Dimensions
Height - Seated (Max)4.572 mm
Length16.5862 mm
Terminal Pitch1.27 mm
Width16.5862 mm