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CPLD ispLSI® 5000VA Family 18K Gates 384 Macro Cells 100MHz 3.3V 388-Pin BGA
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CPLD MACH 5 Family 20K Gates 512 Macro Cells 83.3MHz/125MHz 3.3V 352-Pin BGA Tray
描述
由其分销商提供的 Lattice Semiconductor LC5512MV-45FN484C 的描述。
CPLD ispXPLD 5000MV Family 150K Gates 512 Macro Cells 275MHz 3.3V 484-Pin BGA
ISPXPLD5000MX 150K GATES 512 MC 333MHZ 3.3V 484 FPBGA
3.3V IN-SYSTEM PROGRAMMABLE EXPANDED PROGRAMMABLE LOGIC DEVICE XPLD EE PLD, 5.7ns, 512-Cell, CMOS, PBGA484
Complex Programmable Logic Devices - CPLDs PROGRAM EXPANDED LOG
制造商别名
Lattice Semiconductor 在全球拥有多个品牌，分销商可将其用作替代名称。Lattice Semiconductor 也可称为以下名称：
- LATTICE
- Lattice Semiconductor Corporation
- LAT
- LATT
- LATTIC
- LATTICE SEMI
- LATTICE SEMICONDUCTOR CORP
- LATICE
- LATTICE SEMICONDUCTO
- LATTI
- LATTICE SEMICON
- LITTICE
- LSD
- LATTICE SEMICONDUC
- SAL
- ALTT
- LATTICE SEMICONDUCTOR COR
- Lattice Semiconductor Corporat
- Carley
- LATTICE/A
- LATTICE/S
- LATTICE MIL
- LTTCE
- Lattice / ORCA
- Lattice Semiconductors
技术规格
Physical
Case/PackageBGA
MountSurface Mount
Number of Pins484
Number of Terminals484
Technical
Frequency333 MHz
Max Frequency275 MHz
Max Operating Temperature90 °C
Max Supply Voltage3.6 V
Memory TypeEEPROM, SRAM
Min Operating Temperature0 °C
Min Supply Voltage3 V
Nominal Supply Current33 mA
Number of I/Os253
Number of Logic Blocks (LABs)16
Number of Logic Elements/Cells16
Number of Macrocells512
Number of Programmable I/O256
Operating Supply Current33 mA
Operating Supply Voltage3.3 V
Propagation Delay5.7 ns
RAM Size32 kB
Schedule B8542390000
Turn-On Delay Time4.5 ns
Dimensions
Height - Seated (Max)2.6 mm
Length23 mm
Terminal Pitch1 mm
Width23 mm