供应链
Harmonized Tariff Schedule (HTS) Code8542.31.00.55
Introduction Date1992-01-01
Lifecycle StatusObsolete (Last Updated: 6 months ago)
LTB Date2014-12-31
描述
由其分销商提供的 Lattice Semiconductor GAL20V8B-25LP 的描述。
High Performance E2CMOS PLD Generic Array Logic | IC CPLD 8MC 25NS 24DIP
SPLD GAL Family 8 Macro Cells 41.7MHz EECMOS Technology 5V 24-Pin PDIP
PLD; Programmable AND-Array Logic; 24-Pin PDIP; -0.5 to V; 75 mA; 0.8 V
CPLD Complex Programmable Logic Device 25ns 8MC DIP-24
REGISTER PRELOAD; POWER-UP RESET 24-DIP (0.300 7.62mm) 2000 GAL20V8 complex programmable logic device 41.7MHz 75mA 31.75mm 25ns
制造商别名
Lattice Semiconductor 在全球拥有多个品牌，分销商可将其用作替代名称。Lattice Semiconductor 也可称为以下名称：
- LATTICE
- Lattice Semiconductor Corporation
- LAT
- LATT
- LATTIC
- LATTICE SEMI
- LATTICE SEMICONDUCTOR CORP
- LATICE
- LATTICE SEMICONDUCTO
- LATTI
- LATTICE SEMICON
- LITTICE
- LSD
- LATTICE SEMICONDUC
- SAL
- ALTT
- LATTICE SEMICONDUCTOR COR
- Lattice Semiconductor Corporat
- Carley
- LATTICE/A
- LATTICE/S
- LATTICE MIL
- LTTCE
- Lattice / ORCA
- Lattice Semiconductors
技术规格
Physical
Case/PackageDIP
MountThrough Hole
Number of Pins24
Number of Terminals24
Technical
Frequency41.7 MHz
Max Frequency37 MHz
Max Operating Temperature75 °C
Max Supply Voltage5.25 V
Min Operating Temperature0 °C
Min Supply Voltage4.75 V
Nominal Supply Current90 mA
Number of I/Os8
Number of Inputs20
Number of Macrocells8
Number of Outputs8
Operating Supply Current75 mA
Operating Supply Voltage5 V
Propagation Delay25 ns
Temperature GradeCommercial Extended
Turn-On Delay Time25 ns
Dimensions
Height - Seated (Max)5.334 mm
Length31.75 mm
Terminal Pitch2.54 mm
Width7.62 mm