供应链
Harmonized Tariff Schedule (HTS) Code8542.31.00.55
Introduction Date1991-11-01
Lifecycle StatusObsolete (Last Updated: 4 months ago)
相关零件
Intel / AlteraEPM3512AQC208-7N
CPLD MAX® 3000A Family 10K Gates 512 Macro Cells 116.3MHz 3.3V 208-Pin PQFP Tray
Rochester ElectronicsEPM7512BQC208-5
CPLD MAX® 7000B Family 10K Gates 512 Macro Cells 163.9MHz 2.5V 208-Pin PQFP Tray
XilinxXCR3512XL-7PQG208C
CPLD CoolRunner XPLA3 Family 12K Gates 512 Macro Cells 135MHz 0.35um (CMOS) Technology 3.3V 208-Pin PQFP
XilinxXC2C512-7PQ208C
CPLD CoolRunner -II Family 12K Gates 512 Macro Cells 179MHz 0.18um (CMOS) Technology 1.8V 208-Pin PQFP
描述
由其分销商提供的 Intel / Altera EPM7512AEQC208-7N 的描述。
CPLD MAX 7000A Family 10K Gates 512 Macro Cells 116.3MHz 3.3V 208-Pin PQFP
IC MAX 7000 CPLD 512 208QFP
IC CPLD 512MC 7.5NS 208QFP
EE PLD, 7.5ns, 512-Cell, CMOS, PQFP208
PROGRAMMABLE LOGIC:CPLD <NV
制造商别名
Intel / Altera 在全球拥有多个品牌，分销商可将其用作替代名称。Intel / Altera 也可称为以下名称：
- Altera (Intel)
- Altera (Intel Programmable Solutions Group)
- Intel FPGAs/Altera
- ALTERA CORP
- Intel Corporation
- IntelProgrammable Solutions Group
- Intel / Alte
- INTEL CORP
- ALTERA CORPORATION
- ALTERAINERNATIONALLIMITED
技术规格
Physical
Body MaterialPlastic
Case/PackageQFP
MountSurface Mount
Number of Pins208
Number of Terminals208
Technical
Frequency166.67 MHz
Max Frequency116.3 MHz
Max Operating Temperature70 °C
Max Supply Voltage3.6 V
Memory TypeEEPROM
Min Operating Temperature0 °C
Min Supply Voltage3 V
Number of Gates10000
Number of I/Os176
Number of Logic Blocks (LABs)32
Number of Logic Elements/Cells32
Number of Macrocells512
Number of Programmable I/O176
Operating Supply Voltage3.3 V
PackagingBulk
Propagation Delay7.5 ns
Speed Grade7
Temperature GradeCommercial
Turn-On Delay Time7.5 ns
Dimensions
Terminal Pitch500 µm