供应链
Harmonized Tariff Schedule (HTS) Code8542.39.00.60
Introduction Date1988-04-01
Lifecycle StatusObsolete (Last Updated: 2 weeks ago)
LTB Date1998-12-27
描述
由其分销商提供的 Intersil CD74ACT109E 的描述。
Flip Flop JK-Type Dual Positive-Edge Triggered 4.5V to 5.5V 16-Pin PDIP
J-Kbar Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, PDIP16
Tube 74ACT ACT Obsolete flip flop 5.33mm 4.5V 10.3ns @ 5V 50pF 100MHz
IC FF JK TYPE DUAL 1BIT 16DIP
IC FF JK-TYPE 2-ELE 1-BIT
DUAL J-K FLIP FLOP
制造商别名
Intersil 在全球拥有多个品牌，分销商可将其用作替代名称。Intersil 也可称为以下名称：
- INTER
- INTERS
- ISL
- INTERSI
- Intersil Corporation
- INTERSIL CORP
- INTESIL
- INSL
- INTR
- INTERSL
- INTS
- Intersil (Renesas Electronics America)
- Harris Semiconductor
- INTERSIL/HARRIS
- INTRSL
- INTSL
- INERSIL
- HARRIS SEMI
- Intersil (Renesas Electronics Corporation)
- Intersil(Renesas Electronics)
- INTERSIL CHINA LIMITED
- Intersil / Renesas
- INTERSIL/PBF
- Harris / Intersil
- INTERSIL A RENESAS COMPANY
技术规格
Physical
Case/PackageDIP
Number of Terminals16
Technical
Clock Edge Trigger TypePositive Edge
Frequency100 MHz
Load Capacitance50 pF
Logic FunctionAND, Flip-Flop
Low Level Output Current24 mA
Max Operating Temperature125 °C
Max Supply Voltage5.5 V
Min Operating Temperature-55 °C
Min Supply Voltage4.5 V
Nominal Supply Voltage (DC)5 V
Number of Bits2
Number of Circuits2
Propagation Delay10.3 ns
Temperature GradeMilitary
Dimensions
Height - Seated (Max)5.33 mm
Length19.17 mm
Terminal Pitch2.54 mm
Width7.62 mm