供应链
Harmonized Tariff Schedule (HTS) Code8542.31.00.55
Introduction Date1991-11-01
Lifecycle StatusObsolete (Last Updated: 4 months ago)
LTB Date2017-06-01
LTD Date2017-12-01
相关零件
Lattice SemiconductorM5-256/120-15YC/1
CPLD MACH 5 Family 10K Gates 256 Macro Cells 45.5MHz/62.5MHz 5V 160-Pin PQFP Tray
Lattice SemiconductorM5-256/120-12YC/1
CPLD MACH 5 Family 10K Gates 256 Macro Cells 52.6MHz/83.3MHz 5V 160-Pin PQFP Tray
Lattice SemiconductorM5-128/120-12YC/1
CPLD MACH 5 Family 5K Gates 128 Macro Cells 52.6MHz/83.3MHz 5V 160-Pin PQFP Tray
Intel / AlteraEPM7256SQC208-15
CPLD MAX 7000S Family 5K Gates 256 Macro Cells 76.9MHz 5V 208-Pin PQFP
描述
由其分销商提供的 Intel / Altera EPM7192SQC160-15N 的描述。
CPLD MAX® 7000Family 3.75KGates 192Macro Cells 76.9MHz 5V 160-Pin PQFP Tray
192 4.75V 15ns 5.25V PQFP,QFP 28mm*28m*4.1mm
EE PLD, 15ns, 192-Cell, CMOS, PQFP160
制造商别名
Intel / Altera 在全球拥有多个品牌，分销商可将其用作替代名称。Intel / Altera 也可称为以下名称：
- Altera (Intel)
- Altera (Intel Programmable Solutions Group)
- Intel FPGAs/Altera
- ALTERA CORP
- Intel Corporation
- IntelProgrammable Solutions Group
- Intel / Alte
- INTEL CORP
- ALTERA CORPORATION
- ALTERAINERNATIONALLIMITED
技术规格
Physical
Case/PackageQFP
MountSurface Mount
Number of Pins160
Number of Terminals160
Technical
Frequency100 MHz
Max Frequency100 MHz
Max Operating Temperature70 °C
Max Supply Voltage5.25 V
Memory TypeEEPROM
Min Operating Temperature0 °C
Min Supply Voltage4.75 V
Number of Gates3750
Number of I/Os124
Number of Inputs124
Number of Logic Blocks (LABs)12
Number of Logic Elements/Cells12
Number of Macrocells192
Number of Outputs124
Number of Programmable I/O124
Operating Supply Voltage5 V
Propagation Delay15 ns
Schedule B8542390000
Speed Grade15
Temperature GradeCommercial
Turn-On Delay Time15 ns
Dimensions
Height - Seated (Max)4.07 mm
Length28 mm
Terminal Pitch650 µm
Width28 mm