供应链
Harmonized Tariff Schedule (HTS) Code8542.31.00.55
Introduction Date1991-11-01
Lifecycle StatusObsolete (Last Updated: 6 months ago)
LTB Date2017-06-01
LTD Date2017-12-01
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Intel / AlteraEPM7128AELC84-10N
CPLD MAX 7000A Family 2.5K Gates 128 Macro Cells 98MHz 3.3V 84-Pin PLCC
描述
由其分销商提供的 Intel / Altera EPM7128SLC84-10N 的描述。
CPLD MAX® 7000Family 2.5KGates 128Macro Cells 100MHz 5V 84-Pin PLCC Tray
IC, MAX ISP PLD, 7128, PLCC84, 3.3V; CPLD Type: EEPROM; No. of Macrocells: 128; No. of I/O's: 68I/O's; Logic Case Style: LCC; No. of Pins: 84Pins; Frequency: 100MHz; Supply Voltage Min: 4.75V; Supply Voltage Max: 5.25V; Propagat
IC, CPLD, EEPROM, 128, 10NS, 100MHZ, LCC-84; CPLD Type:EEPROM; No. of Macrocells:128; No. of I/O's:68; Series:MAX 7000; Propagation Delay:10ns; Global Clock Setup Time:7ns; Frequency:100MHz; Supply Voltage Range:4.75V to 5.25V ;RoHS Compliant: Yes
制造商别名
Intel / Altera 在全球拥有多个品牌，分销商可将其用作替代名称。Intel / Altera 也可称为以下名称：
- Altera (Intel)
- Altera (Intel Programmable Solutions Group)
- Intel FPGAs/Altera
- ALTERA CORP
- Intel Corporation
- IntelProgrammable Solutions Group
- Intel / Alte
- INTEL CORP
- ALTERA CORPORATION
- ALTERAINERNATIONALLIMITED
技术规格
Physical
Case/PackagePLCC
MountSurface Mount
Number of Pins84
Number of Terminals84
Technical
Frequency125 MHz
Max Frequency125 MHz
Max Operating Temperature70 °C
Max Supply Voltage5.25 V
Memory TypeEEPROM
Min Operating Temperature0 °C
Min Supply Voltage4.75 V
Number of Gates2500
Number of I/Os68
Number of Inputs68
Number of Logic Blocks (LABs)8
Number of Logic Elements/Cells8
Number of Macrocells128
Number of Outputs68
Number of Programmable I/O68
Operating Supply Voltage5 V
Propagation Delay10 ns
Schedule B8542390000
Speed Grade10
Temperature GradeCommercial
Turn-On Delay Time10 ns
Dimensions
Height3.81 mm
Height - Seated (Max)5.08 mm
Length29.3116 mm
Terminal Pitch1.27 mm
Width29.3116 mm