供应链
Harmonized Tariff Schedule (HTS) Code8542.31.00.55
Introduction Date1999-01-01
Lifecycle StatusObsolete (Last Updated: 5 months ago)
LTB Date2017-06-01
LTD Date2017-12-01
相关零件
Intel / AlteraEP20K100QC208-1
FPGA APEX 20K Family 100K Gates 4160 Cells 250MHz CMOS Technology 2.5V 208-Pin PQFP
Rochester ElectronicsEP20K100QC208-2
FPGA APEX 20K Family 100K Gates 4160 Cells 200MHz CMOS Technology 2.5V 208-Pin PQFP
Rochester ElectronicsEP20K60EQC240-2
FPGA APEX 20K Family 60K Gates 2560 Cells 200MHz CMOS Technology 1.8V 240-Pin PQFP
MicrochipA2F200M3F-PQ208
FPGA SmartFusion Family 200K Gates 350MHz 130nm Technology 1.5V 208-Pin QFP
描述
由其分销商提供的 Intel / Altera EP20K100EQC240-2N 的描述。
FPGA APEX 20K Family 100K Gates 4160 Cells 250MHz 0.22um Technology 1.8V 240-Pin PQFP
MACROCELL CMOS RoHS Compliant GULL WING FPGA 0C~85C TJ 2.02ns 1.81.8/3.3V 4.1mm
Lead Free MACROCELL CMOS OTHER FPGA 85C 6.5kB 2.02ns 250MHz
Loadable PLD, 2.02ns, CMOS, PQFP240
制造商别名
Intel / Altera 在全球拥有多个品牌，分销商可将其用作替代名称。Intel / Altera 也可称为以下名称：
- Altera (Intel)
- Altera (Intel Programmable Solutions Group)
- Intel FPGAs/Altera
- ALTERA CORP
- Intel Corporation
- IntelProgrammable Solutions Group
- Intel / Alte
- INTEL CORP
- ALTERA CORPORATION
- ALTERAINERNATIONALLIMITED
技术规格
Physical
Case/PackagePQFP
MountSurface Mount
Number of Pins240
Number of Terminals240
Technical
Frequency250 MHz
Max Frequency100 MHz
Max Operating Temperature85 °C
Max Supply Voltage1.89 V
Memory Size6.5 kB
Min Operating Temperature0 °C
Min Supply Voltage1.71 V
Nominal Supply Voltage (DC)1.8 V
Number of Gates263000
Number of I/Os183
Number of Inputs175
Number of Logic Blocks (LABs)416
Number of Logic Elements/Cells4160
Number of Outputs175
Propagation Delay2.02 ns
RAM Size6.5 kB
Schedule B8542390000
Dimensions
Height - Seated (Max)4.1 mm
Length32 mm
Terminal Pitch500 µm
Width32 mm