供应链
Country of OriginMainland China, Malaysia, Taiwan, USA, Vietnam
Export Control Classification Number (ECCN) CodeEAR99
Harmonized Tariff Schedule (HTS) Code8542.31.00.55
Introduction Date2011-05-03
Lifecycle StatusProduction (Last Updated: 2 weeks ago)
描述
由其分销商提供的 Intel / Altera 5M40ZE64C5N 的描述。
CPLD MAX® V Family 32 MacroCells 118.3MHz 1.8V 64-Pin EQFP EP Tray
CPLD - Complex Programmable Logic Devices CPLD - MAX V 32 Macro 54 IOs
Cpld, Max V, 40 Le, 64Eqfp; Cpld Type:Flash; No. Of Macrocells:32; No. Of I/O's:54I/O's; Logic Case Style:Qfp; No. Of Pins:64Pins; Frequency:118.3Mhz; Supply Voltage Min:1.71V; Supply Voltage Max:1.89V; Propagation Delay:7.5Ns; Rohs Compliant: Yes |Altera 5M40ZE64C5N
制造商别名
Intel / Altera 在全球拥有多个品牌，分销商可将其用作替代名称。Intel / Altera 也可称为以下名称：
- Altera (Intel)
- Altera (Intel Programmable Solutions Group)
- Intel FPGAs/Altera
- ALTERA CORP
- Intel Corporation
- IntelProgrammable Solutions Group
- Intel / Alte
- INTEL CORP
- ALTERA CORPORATION
- ALTERAINERNATIONALLIMITED
技术规格
Physical
Case/PackageQFP
MountSurface Mount
Number of Pins64
Number of Terminals64
Weight1.764389 g
Technical
Max Frequency118.3 MHz
Max Operating Temperature85 °C
Max Supply Voltage1.89 V
Memory Size1 kB
Memory TypeFLASH
Min Operating Temperature0 °C
Min Supply Voltage1.71 V
Number of I/Os54
Number of Inputs54
Number of Logic Blocks (LABs)8
Number of Logic Elements/Cells40
Number of Macrocells32
Number of Outputs54
Operating Supply Current25 µA
Operating Supply Voltage1.8 V
Propagation Delay14 ns
Schedule B8542390000
Speed Grade5
Dimensions
Height - Seated (Max)1.2 mm
Length7 mm
Terminal Pitch400 µm
Width7 mm