Win Source 时钟和计时

SY100EP15U Series 2.5 GHz PECL/ECL 1: 4 Fanout Buffer with 2: 1 Input MUX-TSSOP-16

Lv Cml 2X2 Crosspoint W/ 6 Outputs & W/o Eq 32 VQFN 5X5X0.9MM T/r Rohs Compliant: Yes

IC CLK BUFFER 1: 8 750MHZ 32QFN / Clock Fanout Buffer (Distribution) IC 1: 8 750 MHz 32-VFQFN Exposed Pad

Frequency Synthesizer, 200 MHz, 4 Outputs, 3.135 V to 3.465 V, 24 Pins, QFN-EP

Clock 8-SOIC (0.154 3.90mm Width) PL123 e3 clock generator circuit 3.6V 134MHz 4.9mm 0.35ns

Clock Buffer, Fanout, 4.5 GHz to 2 Outputs, 2.375 V to 2.625 V, 16 Pins, QFN-EP

Low Skew Clock Driver, 524 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8

3.3V/5V Data and Differential Clock D Flip Flop with Reset

5V/3.3V Enhanced Differential Receiver 10 MSOP 3X3X1.0MM T/r Rohs Compliant: Yes

Clock 8-SOIC (0.154 3.90mm Width) PL123 e3 clock generator circuit 3.6V 134MHz 4.9mm 0.35ns