Win Source 时钟缓冲器、驱动器

PLL Clock Generator, 25 MHz to 200 MHz, 2 Outputs, 3 V to 3.6 V, 16 Pins, QSOP

Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20

CY2309C Series Single PLL 3.3 V 133 MHz Zero Delay Clock Buffer SMT - SOIC-16

Input Mux - 2: 1 Differential, 2.5 V / 3.3 V, Clock / Data Fanout Buffer - 1: 6 LVPECL

IEEE 1588 & Synchronous Ethernet Packet Clock Network Synchronizer 144-Pin LBGA Tray

PLL Based Clock Driver, 9DB Series, 4 True Output(s), 0 Inverted Output(s), PDSO28

Low Skew Clock Driver, 553 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8

IC CLK MULTPX 2: 1 2.5GHZ 16VFQFN / Clock Multiplexer IC 2: 1 2.5 GHz 16-VFQFN Exposed Pad

10Gbps Differential CML Line Driver/Receiver w/Internal Termination - 16-Pin QFN - Tube

Clock Fanout Buffer 16-OUT 1-IN 1: 16 64-Pin VFQFPN EP Tray