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these 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. they are particularly suitable for implementing buffer registers i/o ports bidirectional bus drivers and working registers. the eight flip-flops of the hc374 devices are edge-triggered d-type flip-flops. on the positive transition of the clock (clk) input the q outputs are set to the logic levels that were set up at the data (d) inputs. an output-enable (oe)\ input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. in the high-impedance state the outputs neither load nor drive the bus lines significantly. the high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. view all in datasheet
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