Texas Instruments CDCU877A

1.8V PHASE LOCK LOOP CLOCK DRIVER

The CDCU877 is a high-performance, low-jitter, low-skew, zero-delay buffer that distributes a differential clock inputpair (CK, CKYnFBOUTCKFBINFBOUTY7CKFBINCK

the cdcu877 is a high-performance low-jitter low-skew zero-delay buffer that distributes a differential clock inputpair (ck ck) to ten differential pairs of clock outputs (yn yn) and to one differential pair of feedback clock outputs (fbout fbout). the clock outputs are controlled by the input clocks (ck ck) the feedback clocks (fbin fbin) the lvcmos control pins (oe os) and the analog power input (avdd). when oe is low the clock outputs except fbout/fbout are disabled while the internal pll continues to maintain its locked-in frequency. os (output select) is a program pin that must be tied to gnd or vdd. when os is high oe functions as previously described. when os and oe are both low oe has no affect on y7/y7 they are free running. view all in datasheet