onsemi 74LCX112SJ

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOP-II Rail

J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16

10¦ÌA 7.5ns@ 3.3V,50pF Complimentary 2 2V 3.6V 24mA Set(Preset) and Reset 7pF 24mA 150MHz SOP-16

IC FF JK TYPE DOUBLE 1BIT 16SOP

The LCX112 is a dual J-K flip-flop. Each flip-flop has independent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q# outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input. LCX devices are designed for low voltage (3.3V or 2.5) operation with the added capability of interfacing to a 5V signal environment. The 74LCX112 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.